By Rodger H. Hosking
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Additional resources for Digital Receiver Handbook: Basics of Software Radio
The built-in clock/sync bus supports multiple module synchronization as well as dual on-board oscillators for independent input and output clock rates. Furthermore, the Model 7140 offers the VITA 42 XMC interface. This allows it to transfer data through optional Serial RapidIO, PCI-Express, or other switched fabric interfaces, which provide a highspeed streaming data path that is independent of the PCI bus. com/sftradcentral. As shown in Figure 43, this module is also available in a variety of form factors including PCI (Model 7640), 3U cPCI (Model 7340), 6U cPCI (Model 7240, or Model 7240D with twice the density of the other models) and PMC ruggedized versions (Model 7140-70x).
Up to 80 modules can be synchronized with the Model 9190 Clock and Sync Generator. Custom interfaces can be implemented by using the 64 user-defined FPGA I/O pins on the P4 connector. Four parallel outputs from the four receivers deliver data into the Virtex-II FPGA which can be either the XC2V1000 or XC2V3000. The outputs of the two A/D converters are also connected directly to the FPGA to The FPGA is fully supported with the GateFlow FPGA Design Kit and GateFlow FPGA IP Core Library. Software drivers support VxWorks, Windows and Linux processor board operating systems.
The heart of the RTS 2501 is the Pentek Model 4205 I/O Processor featuring a 1 GHz MPC7457 G4 PowerPC, mezzanine sites for both VIM and PMC modules, and two Xilinx Virtex-II FPGAs. The G4 PowerPC acts both as an executive for managing data transfer tasks as well as performing digital signal processing or formatting functions. Scalable from four to 80 channels in a single 6U VMEbus chassis, the RTS 2501 serves equally well as a real-time system for advanced research projects and proof-of-concept prototypes, or as a cost-effective strategy for deploying high-performance, multichannel embedded systems.